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Migrate from Vivado xsim to GHDL: six lines in a 34-line testbench stop the first ghdl -a run
FPGA verification engineers moving VHDL testbenches from AMD Vivado's xsim to GHDL: one 34-line UART testbench that ran clean in xsim produced 6 findings in GHDL Migration Check — 3 errors and 3 warnings — before GHDL ever saw it.
Why teams move the testbench, not the synthesis
Vivado ML Standard and its simulator are free, but larger devices need Vivado ML Enterprise, and Mouser lists a node-locked Enterprise seat (EF-VIVADO-ENTER-NL) at $5,063.25 (checked 2026-09-29). GHDL is free under GPL-2.0 and installs in seconds on a CI runner. So a common split is one Vivado seat for synthesis and GHDL for every testbench run.
The catch: xsim and GHDL do not accept the same VHDL by default.
The six lines
The sample file is tb_uart_rx.vhd. Here is what the check reported, with the fix for each line:
| Vivado xsim line | GHDL fix |
|---|---|
| library unisim; | compile UNISIM with compile-xilinx-vivado.sh |
| library xpm; | inferred VHDL FIFO, no XPM |
| shared variable errors : integer | protected type, or -frelaxed |
| use ieee.std_logic_unsigned.all; | use ieee.numeric_std.all; |
| process(all) | ghdl -a --std=08 |
| std.env.stop; | --std=08 |
Three of them are errors, because a flag alone will not fix them:
- library unisim — Xilinx primitives ship with Vivado. GHDL has a vendor script, compile-xilinx-vivado.sh, that compiles them from your Vivado install; after that you pass -P with the output directory.
- library xpm — XPM macros are SystemVerilog. The VHDL package only declares the components. GHDL simulates VHDL, so an XPM FIFO has no model; swap in an inferred FIFO or a behavioural model for simulation.
- shared variable errors : integer — legal in VHDL-93. But this file uses process(all) and std.env, so it needs --std=08, and under 2008 GHDL stops: a shared variable must be of a protected type. Wrap it, or pass -frelaxed to turn the error into a warning.
The other three are warnings: they need a flag. GHDL's default standard is 93c, so process(all) and std.env.stop fail until every ghdl -a, -e and -r call gets --std=08. std_logic_unsigned is a Synopsys package; GHDL takes it with -fsynopsys, and the cleaner fix is numeric_std.
Why not just run GHDL
GHDL stops at the first analysis error in a file. You fix library unisim, run again, meet process(all), run again, meet the shared variable. A chatbot will suggest flags from memory but cannot see your file. The check lists every line in one pass and prints the command the file needs — here ghdl -a --std=08 -fsynopsys.
What it covers
12 rules: UNISIM, UNIMACRO, SECUREIP and XPM libraries; Synopsys std_logic_arith, std_logic_unsigned and std_logic_signed; five VHDL-2008 features (process(all), matching operators such as ?=, std.env, context references, to_string and to_hstring); plain shared variables in files that need 2008; and IEEE 1735 protected envelopes that GHDL cannot decrypt.
If the file already records its flags in a comment, such as -- ghdl -a --std=08 -fsynopsys, the rules those flags cover stay quiet, so the list shrinks to what is really left.
Try it on your file
Open a .vhd file in VS Code and run GHDL Migration Check: Check this file, or paste it into the free web page. The file check is free and complete. A licence key adds a scan of every .vhd file in the workspace and a Markdown migration report per library.
15 seconds — what it actually does
Questions people ask
What does GHDL Migration Check do?
It reads a VHDL testbench or source file and flags every line that Vivado xsim accepts but GHDL rejects or needs a flag for: UNISIM, UNIMACRO, SECUREIP and XPM libraries, Synopsys std_logic_unsigned, VHDL-2008 features without --std=08, plain shared variables and IEEE 1735 encrypted blocks. Each finding carries the GHDL fix and the ghdl -a flags the file needs.
Who is GHDL Migration Check for?
FPGA and ASIC verification engineers who wrote VHDL testbenches in AMD Vivado's xsim simulator and now want them to run in GHDL, usually in a CI pipeline, a VUnit or cocotb flow, or on a laptop without a Vivado install. It also suits teams handing a Vivado project to a contractor who only has open-source tools.
Why not just run GHDL and fix the errors?
GHDL stops at the first analysis error in a file, so you learn about library unisim, then process(all), then the shared variable, one run at a time. A chatbot guesses flags from memory and cannot see your file. This check lists every Vivado-only line in one pass, with the flag or code change for each.
What is free and what needs a licence key?
Free, with no key: check the open .vhd file in VS Code or paste it into the web page, and get every finding with its GHDL fix and the ghdl -a command line. The $29 licence key adds a one-pass scan of every .vhd file in the workspace and a Markdown migration report with the flag set per library.
What does staying on the Vivado route cost?
Vivado ML Standard and its xsim simulator are free, but larger devices need Vivado ML Enterprise; Mouser lists a node-locked Enterprise seat (EF-VIVADO-ENTER-NL) at $5,063.25, checked 2026-09-29. GHDL is free under GPL-2.0, so many teams keep one Vivado seat for synthesis and run testbenches in GHDL. This check costs $29 once.
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